Production Line PCB Serial Programming and Testing Method and System

ABSTRACT

A system and method for testing a wireless earpiece which provides improved efficiencies in manufacturing. Automated testing of one or more printed circuit boards of the wireless earpiece is initiated. The semi-assembled wireless earpiece is tested. End-of-line functional testing is performed. Final acoustic testing of the wireless earpiece is performed.

PRIORITY STATEMENT

This application is a continuation of U.S. Non-Provisional patent application Ser. No. 15/843,140, filed on Dec. 15, 2017 and claims priority to U.S. Pat. No. 9,854,372, filed on Aug. 23, 2016 and U.S. Provisional Patent Application No. 62/211,724, filed on Aug. 29, 2015 all of which are titled Production Line PCB Programming and Testing Method and System and all of which are hereby incorporated by reference in their entireties.

FIELD OF INVENTION

The present invention relates to wireless device manufacturing. More particularly, but not exclusively, the present invention relates to production line PCB serial programming and testing.

BACKGROUND

Usage of wireless devices has grown significantly in recent years as manufacturing processes, devices, and wireless standards have improved. As wireless devices become smaller and more portable, space limitations for components and circuitry become even more constrained. Space constraints are particularly limited for wireless earpieces. Such space constraints preclude the usage of significant number of tests points for device layouts utilizing printed circuit boards (PCBs). As a result, testing PCBs during the manufacturing process may be difficult, potentially resulting in additional time and equipment requirements, failed devices, extra troubleshooting, and additional expense.

SUMMARY

One aspect includes a system, method, and testing device including a processor and memory with instructions executed to test a wireless earpiece. Automated testing of one or more printed circuit boards of the wireless earpiece is initiated. The semi-assembled wireless earpiece is tested. End-of-line functional testing is performed. Final acoustic testing of the wireless earpiece is performed.

Another aspect includes a system for testing a wireless earpiece. The system may include a computing device connected to the wireless earpiece. The system may also include a reference wireless earpiece connected to the computing device. The computing device may be configured to initiate automated testing of one or more printed circuit boards (PCBs) of the wireless earpiece, test the semi-assembled wireless earpiece, perform end-of-line functional testing, and perform final acoustic testing of the wireless earpiece.

BRIEF DESCRIPTION OF THE DRAWINGS

Illustrative embodiments of the present invention are described in detail below with reference to the attached drawing figures, which are incorporated by reference herein and wherein:

FIG. 1 is a pictorial representation of a testing system in accordance with an illustrative embodiment;

FIG. 2 is a flowchart of a process for testing a PCB of a wireless earpiece in accordance with an illustrative embodiment;

FIG. 3 is a flowchart of a process for initiating an automated production panel testing in accordance with an illustrative embodiment;

FIG. 4 is a flowchart of a process for performing semi-assembly of the wireless device in accordance with an illustrative embodiment; and

FIG. 5 depicts a computing system 500 in accordance with an illustrative embodiment.

DETAILED DESCRIPTION

The illustrative embodiments provide a system and method for production line PCB serial programming and testing. In one embodiment, the PCBs may be a component of a wireless earpiece, such as concha or external auditory canal device. When referencing the PCB herein, reference may be made to one or more PCBs, systems, sub-systems, components, or the entire device.

PCBs as well as the sub-systems of the wireless earpiece may be tested throughout the various phases of integration of the wireless earpiece. By utilizing the processes, steps, and methods herein described, the illustrative embodiments provide significant advantages in improving the efficiency of manufacturing production lines for one or more versions of wireless earpieces. In addition, substantial costs savings may be achieved by removing defective components before the defective components are further integrated into the wireless earpiece. As a result, defective devices may be removed more dynamically during the manufacturing process to preserve functioning parts instead of discarding entire systems or sub-systems of the wireless earpiece. In another embodiment, the wireless earpiece may represent any number of wireless devices.

During the described testing processes, the PCBs and corresponding wireless earpieces may be programmed to serially certify functionality of all component sets of the PCB and wireless earpiece. The testing may be performed by a testing system utilizing custom jigs connected or otherwise interfacing to the PCBs and wireless earpieces. In one embodiment, the testing, certification, and other processes of the illustrative embodiments may be implemented utilizing four phases as herein described.

FIG. 1 is a pictorial representation of a testing system 100 in accordance with an illustrative embodiment. In one embodiment, the testing system 100 may be configured for testing an external auditory canal device, such as the wireless earpiece including the PCB 104. The testing system 100 may utilize any number of devices or components or be configured in various ways for performing the processes herein described.

In one embodiment, the testing system 100 may include a computing device 106, an interface 108, testing jigs 110, one or more devices under test (DUT) 102, a reference device 116, and an interface 118.

The computing device 106 may be a desktop computing device, specialized computing device, tablet, one or more servers, databases, or other device(s) for testing the DUT 102. The computing device 106 may represent one or more computing devices configured to communicate or otherwise interface with the DUT 102. In one example, the computing device 106 may represent a personal computer, server, and database for storing testing information for several DUTs.

The computing device 106 may have dedicated hardware and logic, such as signal generators, transceivers, signal processors, light sensors, microphones, speakers, sensors, and measuring devices utilized to measure the performance, characteristics, and responses of the DUT 102. In another embodiment, the computing device 106 may include databases or instructions executed by a processor of the computing device to perform testing. For example, a set of instructions stored in the non-transitory memory of the computing device 106 may be executed to perform the steps herein described.

In another embodiment, all or portions of the measurement equipment may be integrated with or connected to the testing jigs 110. The computing device 106 may also be connected to one or more data or wireless networks. For example, the computing device 106 (as well as the DUT 102 may communicate with one or more wireless networks (e.g., Bluetooth, WiFi, cell, Zigbee, etc.), local area networks, or other wired networks (e.g., Ethernet, powerline, fiber optics, etc.). The networks may represent any number of public and private networks (e.g., the Internet) operated by one or more service providers. For example, testing scripts, programs, updates, or instructions may be retrieved through several interconnected networks including a private WiFi network, local area networks, and public or cloud networks.

The interface 108 and 118 may represent a serial connection, cable, or wire connected between the computing device 106 and the DUT 102 and the computing device 106 and the reference device 116, respectively. For example, the interfaces 108 and 118 may be USB connections from the computing device 106 to the DUT 102 and the reference device 116. The interfaces 108 and 118 may also represent wireless connections, such as Bluetooth, WiFi, near field communications, radio frequency (RF) communications, or other wireless connections established utilizing transmitters, receivers, or transceivers. As a result, the functional aspects of the DUT 102 may be tested.

The testing jigs 110 physically secure the DUT 102 as well as electrically interface with the DUT 102 as well as individual components of the DUT 102 to fully test the DUT 102 and the corresponding PCBs 104. For example, the testing jigs 110 may mechanically secure the DUT 102 utilizing one or more clamps or arms. The testing jigs 110 may also include wires, micro interfaces (e.g., micro USB, etc.), BLUETOOTH or other wireless systems such as radio frequency antennas or other electrical interfaces for connecting, probing, or programming to any number of test points of the PCBs 104.

The reference device 116 may be utilized to generate reference signals for the testing and measuring the DUT 102. In addition, the reference device 116 may be utilized to communicate with the DUT 102 to perform functionality testing as is herein described. The wireless earpiece 102 may be configured for use as a pair (i.e., left ear and right ear). The reference device is used to test the magnetic induction link, to control and trace the semi-assembled DUT 102. The reference device 116 communicates via a gateway to the DUT 102. The reference device may test all major PCB component subsystems; a passing grade allows the PCB to move further down the assembly line for integration into the assembled product.

FIG. 2 is a flowchart of a process for testing a PCB of a wireless earpiece in accordance with an illustrative embodiment. The processes of FIGS. 2-4 may be implemented utilizing a testing system or device and may include multiple phases or steps as herein described. The processes may be performed on a single device at a time or for multiple devices in batches or runs of devices. In one embodiment, the PCBs of the wireless earpiece are produced on a panel including PCBs for several different devices. The test sequence may be run on each PCB associated with a device on a panel (of which each PCB may also be referred to as a device under test—DUT 102). The testing of PCBs on the panel may be performed in parallel, serially, or sequentially. Any PCBs failing testing may be reworked (e.g., modified, refurbished, discarded, recycled, etc.). Reworking at a rework station may provide enhanced test result information for testers. After all the PCBs have been tested on the panel, the successfully evaluated devices may be removed from the panel for integration in a final product. Robotics and computerized testing logic (e.g., logic circuits, firmware, scripts, etc.) may be utilized to minimize manual user intervention in the process. For example, robotics may be used to connect the PCB/DUT to the testing jig, as well as to identify passing PCBs and select these for further assembly line integration, leaving the PCBs not passing on the main circuit board assembly for reworking.

The process of FIG. 2 may begin by initiating an automated production panel testing (step 200). In one embodiment, the system may include a personal computer, server, or other computing device physically connected to a customized PCB. The computing device may be connected to several testing devices and equipment interfacing with the PCB. In one embodiment, the system may utilize a unique radio frequency (RF) antenna connected to an RF test box. For example, the panel may be enclosed in a RF test box isolating outside radio frequencies for more accurate testing. If there is a problem with the panel, the panel may be conveyed 210 to a single rework station 214 attached to a monitor 212. The single rework station 214 may provide detailed data regarding the specific reason(s) for the original test failure. At this point, either the system corrects the issue and returns 216 the DUT back for automated production panel testing 200 or else it is rejected 219.

Next, the system performs semi-assembly testing of the wireless device (step 202). During step 202, the semi-assembly of the DUT is tested utilizing a jig connecting the semi-assembled DUT to the system for automated testing. If there is a problem with the semi-assembly, the semi-assembly may be conveyed 220 to a single rework station 224 attached to a monitor 222. The single rework station 224 may provide detailed data regarding the specific reason(s) for the original test failure. At this point, either the system corrects the issue and returns 226 the semi-assembly back for automated semi-assembly testing 202 or else it is rejected 229.

Next, the system performs end-of-line functionality testing (step 204). During step 204, the wireless device may be completely formed with the battery fully enclosed inside the device. As before, custom-built jigs may be utilized for final testing of the light sensitive componentry. In one embodiment, a reference wireless earpiece may be utilized for testing the DUT. In one embodiment, the reference wireless earpiece is used to test the NFMI antenna and chip combination by communicating in such a way as to test the limits of the NFMI antenna of the DUT and replicating the most extreme conditions expected to be encountered by the DUT. The DUT is expected to communicate without errors and at the limits of the connection range. The testing jig utilized during step 204 may expose any of the potential NFMI linkage errors of the DUT. The testing jig is also utilized to test the pulse oximeter, touch sensors, and red green and blue (RGB) light emitting diodes (LEDs). In one embodiment, the jig may include a mechanical arm for engaging or activating the touch sensor(s). The testing jig may also emulate a pulse for testing the pulse oximeter. The testing jig may include light sensors or devices for detected or reflecting light generated by the LEDs. In one embodiment, the DUT may be light insulated or otherwise enclosed within a shield to ensure ambient light does not affect the results of the testing. In another embodiment, the DUT itself is utilized to measure the LED and pulse oximetry outputs by reflecting the light emitted back onto the sensor contained within the DUT. If the DUT fails the testing, the DUT is rejected 239.

Next, the system performs final acoustic testing (step 206) with the process terminating thereafter. During the final acoustic testing of step 206, a customized testing jig is utilized to perform testing. The testing of step 206 may be performed in an acoustically isolated chamber or room for testing the external auditory canal (EAC) microphone which may be a bone microphone tuned to detect vibrations of the surrounding bony structures, EAC speaker, ambient microphone located on the superolateral segment, and audio over the NFMI linkage of the DUT.

During step 206, audio may be played into the ambient microphone of the DUT and then retransmitted by the EAC loudspeaker and recorded by the microphone placed underneath the testing jig. The recorded audio may then be analyzed against the reference signal. In one embodiment, there are four segments analyzed including: low—for example, 100+ Hz (testing of microphones and speakers for bass), mid—for example, 1000 Hz+ testing for obstruction, high—for example, 3000 Hz+ testing for reference and calibration, and white noise—looking for gaps or peaks, resonance frequencies, or blockages.

Audio may also be played into the EAC microphone and then transmitted by the NFMI to the reference wireless earpiece in the testing jig. The reference wireless earpiece may then send the audio to the computer where the signal may be analyzed against the reference signal. If it fails here, it is rejected 249. After successful performance of final acoustic testing, the successfully produced DUT is sent for packaging 208.

In one embodiment, a single customized jig may be utilized to perform testing during the different steps of FIG. 2. The illustrative embodiments provide point of production analysis and identification of component set issues. The illustrative embodiments maximize the efficiency of production, recognition failures much earlier in the production process and save money through minimizing the waste of functional component sets coupled to failed components. By finding the problems earlier in the process, components may not be irreversibly combined. In some cases, the problems may be diagnosed for preventing other devices from suffering from similar issues. Additionally, some components may be saved for reworking, reusing, or recycling where appropriate.

FIG. 3 is a flowchart of a process for initiating an automated production panel testing in accordance with an illustrative embodiment. In one embodiment, the process of FIG. 3 may correspond to step 200 of FIG. 2. First, the system tests component sets of the PCB for energy consumption (step 302). The system may ensure the energy consumption (as well as the other testing measurements of the processes described herein) is within designated tolerances, thresholds, or ranges (e.g., voltage, current, power in Watts, etc.). Upper, lower, and median measurement values may be specified. Alarms may be generated, or the PCB marked for reworking in response to failing any of the tests. For example, a database of the testing system may be utilized to track the test results (including failures) for subsequent analysis. A serial number, bar code, radio frequency tag, or other assigned identifier may be utilized to associate the PCB or components with the test results and measurements.

Next, the system programs intelligent components on the PCB (step 304). The PCB may include any number of intelligent or programmable components, such as Bluetooth chips, logic chips, field programmable gate arrays (FPGAs), processing chips (e.g., Kinetics ARM chip), and so forth.

Next, the system performs RF testing (step 306). In one embodiment, the Bluetooth device or RF components (e.g., Bluetooth transceiver, WiFi transceiver, etc.) may be instructed to transmit and/or receive on a planned frequency with crystal trimming being performed. Frequency adjustments may be performed to tune or tweak the frequency transmissions of the RF transceiver.

Next, the system tests Bluetooth of the PCB (step 308). In one embodiment, several tests may be implemented and measured according to the preset standards. In one embodiment, test data is transmitted to a receiver of the system and evaluated for errors. In addition, a noise baseline or floor may be set for the Bluetooth components of the PCB.

Next, the system performs a battery protection test of the PCB (step 310). The PCB and corresponding circuits will be checked to verify the system is configured to utilize minimal current when battery voltage is below the manufacturer's minimum specification.

Next, the system tests normal battery charging capabilities of the PCB (step 312). In one embodiment, the voltage and current utilized to charge the battery may be determined as well as the capacity of the battery when fully charged.

Next, the system removes external power and measures power usage (step 314). During step 314, the system verifies the PCB utilizes power within a specified range when drawing power from the internal battery connection.

Next, the system tests to verify the microcontroller of the PCB can connect to the touch sensor, accelerometer, memory, and near-field magnetic induction (NFMI) chip (step 316). In one embodiment, test signals may be sent to each of the various sub-systems (e.g., touch sensor, accelerometer, memory, NFMI chip, radio frequency identification tag, gyroscope, etc.).

Once the testing of FIG. 3 is complete, the system powers down the PCB. After a short delay the PCB is connected to a USB or other interface. The system may then determine the size of the memory available on the PCB. Configuration of the memory or uploading of default files may also be performed as needed.

FIG. 4 is a flowchart of a process for performing semi-assembly of the wireless device in accordance with an illustrative embodiment. In one embodiment, the testing of FIG. 4 may correspond to step 202 of FIG. 2. The PCB may be expensive to manufacture and as a result an electro-mechanical testing jig as previously described may be utilized to interface all or portions of the system (e.g., a computing device) with the PCB.

The process begins by fitting the lateral segment and the medial segment of the DUT to the jig (step 402). At this point, both the lateral and medial segments, (or sub-assemblies) are separate and have not yet been fused together allowing for changes to be made as needed before final assembly. If there is a failure of either of the lateral or medial segments, the segment may be reworked to reduced costs and minimize wastes. The medial segment is the portion of the DUT destined to be placed closest to the tympanic membrane.

Next, the system verifies functionality by loading an initialization file through the jig (step 404). The system loads internal software for the DUT to do testing. During step 404, the DUT is rebooted from the USB. The DUT is then ready to operate as if fully integrated. During the reboot, the DUT is expected to reboot with verification of the various internal devices including NFMI antenna (e.g., calibration), battery, pulse oximeter, amplifier, and other sub-systems and components.

Next, the system reconnects to the DUT to re-enumerate as a mass storage device (step 406). The system may be reconnected through an interface, such as a USB connection. During step 406, the initialization file previously loaded is deleted from the DUT. In addition, a trace file utilized to document functionality of the components of the DUT is copied and removed from the DUT for analysis and to determine if there are any errors.

Next, the system copies all files onto the DUT (step 408). If the DUT continues to pass each step of FIG. 4, the system copies all the system, audio, and other files. At any time during the process of FIG. 4 if a failure occurs, the sub-system, such as the lateral or medial segment, is marked for reworking and further processed. After the process of FIG. 4, the sub-assemblies may be welded together.

The illustrative embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects all generally referred to herein as a “circuit,” “module” or “system.” Furthermore, embodiments of the inventive subject matter may take the form of a computer program product embodied in any tangible medium of expression having computer usable program code embodied in the medium. The described embodiments may be provided as a computer program product, or software, including a machine-readable medium having stored thereon instructions, which may be used to program a computing system (or other electronic device(s)) to perform a process according to embodiments, whether presently described or not, since every conceivable variation is not enumerated herein. A machine-readable medium includes any mechanism for storing or transmitting information in a form (e.g., software, processing application) readable by a machine (e.g., a computer). The machine-readable medium may include, but is not limited to, magnetic storage medium (e.g., floppy diskette); optical storage medium (e.g., CD-ROM); magneto-optical storage medium; read only memory (ROM); random access memory (RAM); erasable programmable memory (e.g., EPROM and EEPROM); flash memory; or other types of medium suitable for storing electronic instructions. In addition, embodiments may be embodied in an electrical, optical, acoustical or other form of propagated signal (e.g., carrier waves, infrared signals, digital signals, etc.), or wireline, wireless, or another communications medium.

Computer program code for carrying out operations of the embodiments may be written in any combination of one or more programming languages, including an object-oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The program code may execute entirely on a user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN), a personal area network (PAN), or a wide area network (WAN), or the connection may be made to an external computer (e.g., through the Internet using an Internet Service Provider).

FIG. 5 depicts a computing system 500 in accordance with an illustrative embodiment. includes a processor unit 501 (possibly including multiple processors, multiple cores, multiple nodes, and/or implementing multi-threading, etc.). The computing system includes memory 507. The memory 507 may be system memory (e.g., one or more of cache, SRAM, DRAM, zero capacitor RAM, Twin Transistor RAM, eDRAM, EDO RAM, DDR RAM, EEPROM, NRAM, RRAM, SONOS, PRAM, etc.) or any one or more of the above already described possible realizations of machine-readable media. The computing system also includes a bus 503 (e.g., PCI, ISA, PCI-Express, HyperTransport®, InfiniBand®, NuBus, etc.), a network interface 505 (e.g., an ATM interface, an Ethernet interface, a Frame Relay interface, SONET interface, wireless interface, etc.), and a storage device(s) 509 (e.g., optical storage, magnetic storage, etc.). The system memory 507 embodies functionality to implement embodiments described above. The system memory 507 may include one or more functionalities facilitating retrieval of the audio information associated with an identifier. Code may be implemented in any of the other devices of the computing system 500. Any one of these functionalities may be partially (or entirely) implemented in hardware and/or on the processing unit 501. For example, the functionality may be implemented with an application specific integrated circuit, in logic implemented in the processing unit 501, in a co-processor on a peripheral device or card, etc. Further, realizations may include fewer or additional components not illustrated in FIG. 5 (e.g., video cards, audio cards, additional network interfaces, peripheral devices, etc.). The processor unit 501, the storage device(s) 509, and the network interface 505 are coupled to the bus 503. Although illustrated as being coupled to the bus 503, the memory 507 may be coupled to the processor unit 501.

While the embodiments are described with reference to various implementations and exploitations, it will be understood these embodiments are illustrative and the scope of the inventive subject matter is not limited to them. In general, techniques for testing and processing wireless earpieces, PCBs, and other components as described herein may be implemented with devices, facilities, or equipment consistent with any hardware system(s). Many variations, modifications, additions, and improvements are possible.

Plural instances may be provided for components, operations or structures described herein as a single instance. Finally, boundaries between various components, operations and data stores are somewhat arbitrary, and operations are illustrated in the context of specific illustrative configurations. Other allocations of functionality are envisioned and may fall within the scope of the inventive subject matter. In general, structures and functionality presented as separate components in the exemplary configurations may be implemented as a combined structure or component. Similarly, structures and functionality presented as a single component may be implemented as separate components. These and other variations, modifications, additions, and improvements may fall within the scope of the inventive subject matter. The previous detailed description is of a small number of embodiments for implementing the invention and is not intended to be limiting in scope. The following claims set forth several the embodiments of the invention disclosed with greater particularity. 

What is claimed:
 1. A method for testing a wireless earpiece, the method comprising: initiating automated testing of one or more printed circuit boards (PCBs) of the wireless earpiece, wherein (1) component sets of the PCBs are tested for energy consumption and (2) a battery within the component sets is tested for charging capabilities; testing the wireless earpiece, wherein the wireless earpiece is semi-assembled; performing end-of-line functional testing, wherein the wireless earpiece is light insulated for testing LEDs of the wireless earpiece; and performing final acoustic testing of the wireless earpiece, wherein the final acoustic testing is performed in an acoustically isolated chamber.
 2. The method of claim 1, further comprising the step of determining voltage and current utilized to charge the battery.
 3. The method of claim 2, further comprising the step of determining the capacity of the battery when fully charged.
 4. The method of claim 1, further comprising the step of determining whether the energy consumption is determined to be within designated tolerances.
 5. The method of claim 4, further comprising the step of generating alarms in response to any of the PCBs failing any of the tests.
 6. The method of claim 5, wherein a database is utilized to track the testing results for subsequent analysis.
 7. The method of claim 6, wherein a serial number, a bar code, a radio frequency tag, or other assigned identifier may be utilized to associate the PCBs or components with the test results and measurements.
 8. A system for testing a wireless earpiece, the system comprising: a computing device connected to the wireless earpiece; a reference wireless earpiece connected to the computing device; wherein the computing device is configured to: initiate automated testing of one or more printed circuit boards (PCBs) of the wireless earpiece; test the wireless earpiece, wherein the wireless earpiece is semi-assembled; test battery voltage and current utilized to charge the battery to determine a capacity of the battery when fully charged; testing the wireless earpiece, wherein the wireless earpiece is semi-assembled; perform end-of-line functional testing including detecting light generated by LEDs of the wireless earpiece; and perform final acoustic testing of the wireless earpiece, wherein the final acoustic testing is performed in an acoustically isolated chamber; and wherein the reference wireless earpiece is used to test a connection range of a communication element and a processor associated with the communication element within the semi-assembled wireless earpiece.
 9. The system according to claim 8, further comprising a rework station for receiving a failed semi-assembly from the computing device; and a monitor operably coupled to the rework station providing data regarding the reason for the semi-assembly failing; wherein the failed semi-assembly is rejected if the second rework station cannot repair the failed semi-assembly and the failed semi-assembly is returned to the computing device for semi-assembly testing if the failed semi-assembly can be repaired.
 10. The system according to claim 9, wherein the computing device performs end-of-line functional testing.
 11. The system according to claim 10, wherein the wireless earpiece is rejected if a failure is detected during end-of-line functional testing.
 12. The system according to claim 11, wherein the computing device performs final acoustic testing of the wireless earpiece and rejects any failed wireless earpiece.
 13. The system according to claim 11, wherein the wireless earpiece is packaged.
 14. A method for testing a wireless earpiece, the method comprising: initiating an automated production panel, having a plurality of PCB (printed circuit boards) produced thereon for testing, verifing the PCB utilizes power within a specified range when drawing power from an internal battery connection; verifying a microcontroller of the PCB can connect to a touch sensor, an accelerometer and a memory; performing semi-assembly testing of the wireless earpiece; performing end-of-line functional testing, wherein the wireless earpiece is light insulated for testing LEDs of the wireless earpiece; and performing final acoustic testing of the wireless earpiece, wherein the final acoustic testing is performed in an acoustically isolated chamber.
 15. The method according to claim 14, further comprising the step of rejecting the wireless earpiece if a failure is detected during end-of-line functional testing.
 16. The method according to claim 15, further comprising the step of rejecting the wireless earpiece if a failure is detected during final acoustic testing.
 17. The method according to claim 16, further comprising the step of packaging the wireless earpiece.
 18. The method according to claim 17, further comprising the step of testing component sets of a PCB for energy consumption.
 19. The method according to claim 18, further comprising the step of testing an NFMI antenna to test the limits of the NFMI antenna.
 20. The method according to claim 19, further comprising the step of testing red green and blue (RGB) light emitting diodes (LEDs). 